IDesignSpec for Word 2007-2010

Developer's DescriptionBy AgnisysGenerate register and memory maps for ASIC, FPGA, IP and SoC from Specification.IDesignSpec is an award winning engineering tool that allows an IP, chip or system designer to create the register map specification once and automatically generate all possible views from it. Various outputs are possible such as UVM, OVM, RALF, SystemRDL, IP-XACT etc. User defined outputs can be created using Tcl or XSLT scripts. IDesignSpec's PATENT PENDING technology improves engineer's productivity and design quality. IDesignSpec is available in several forms: IDSWord : Plugin for Word 2003, Word 2007, Word 2010; IDSExcel : Plugin for Excel 2007, Excel 2010; IDSOO : Plugin for OpenOffice, StarOffice and LibreOffice; IDSBatch : Provides the same functionality in batch mode on Linux or Windows. This free version if for IDSWord which enables the user to create specification documents and then generate code for UVM (Universal Verification methodology). Only 25 registers can be generated.